最新的2.1版本NetFPGA開發(fā)板的實物圖如圖所示
NetFPGA的主要組成部分為:
Xilinx Virtex-II Pro 50 (賽靈思Virtex-II Pro 50 FPGA )
JTAG cable connector can be used to run Xilinx (國際通用的JTAG測試端口)
4.5 MBStatic Random Access Memory (SRAM) (4.5 MB高速靜態(tài)隨機存取器)
Connector block on left of PCB interfaces to 4 external RJ45 plugs (4組高速以太網(wǎng)口)
Interfaces to standard Gigabit Ethernet using Cat5E or Cat6 copper network cables (支持Cat5E或Cat6標準電纜)
Wire-speed processing on all ports at all time using FPGA logic (基于FPGA硬件控制電路)
Two SATA-style connectors to Multi-Gigabit I/O (MGIO) on right-side of PCB (右側(cè)兩個串口連接線)
Double-Date Rate Random Access Memory (DDR2 DRAM) (64MB二代內(nèi)存)
Standard PCI Form Factor (標準PCI接口)
Dimensions: 25cm long x 10cm tall (10" x 4")(25厘米長x 10厘米高)